
callback-self:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400480 <_init>:
  400480:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400484:	910003fd 	mov	x29, sp
  400488:	94000030 	bl	400548 <call_weak_fn>
  40048c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400490:	d65f03c0 	ret

Disassembly of section .plt:

00000000004004a0 <.plt>:
  4004a0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4004a4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf85c>
  4004a8:	f947fe11 	ldr	x17, [x16, #4088]
  4004ac:	913fe210 	add	x16, x16, #0xff8
  4004b0:	d61f0220 	br	x17
  4004b4:	d503201f 	nop
  4004b8:	d503201f 	nop
  4004bc:	d503201f 	nop

00000000004004c0 <__libc_start_main@plt>:
  4004c0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4004c4:	f9400211 	ldr	x17, [x16]
  4004c8:	91000210 	add	x16, x16, #0x0
  4004cc:	d61f0220 	br	x17

00000000004004d0 <__gmon_start__@plt>:
  4004d0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4004d4:	f9400611 	ldr	x17, [x16, #8]
  4004d8:	91002210 	add	x16, x16, #0x8
  4004dc:	d61f0220 	br	x17

00000000004004e0 <abort@plt>:
  4004e0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4004e4:	f9400a11 	ldr	x17, [x16, #16]
  4004e8:	91004210 	add	x16, x16, #0x10
  4004ec:	d61f0220 	br	x17

00000000004004f0 <printf@plt>:
  4004f0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4004f4:	f9400e11 	ldr	x17, [x16, #24]
  4004f8:	91006210 	add	x16, x16, #0x18
  4004fc:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400500 <_start>:
  400500:	d280001d 	mov	x29, #0x0                   	// #0
  400504:	d280001e 	mov	x30, #0x0                   	// #0
  400508:	aa0003e5 	mov	x5, x0
  40050c:	f94003e1 	ldr	x1, [sp]
  400510:	910023e2 	add	x2, sp, #0x8
  400514:	910003e6 	mov	x6, sp
  400518:	580000c0 	ldr	x0, 400530 <_start+0x30>
  40051c:	580000e3 	ldr	x3, 400538 <_start+0x38>
  400520:	58000104 	ldr	x4, 400540 <_start+0x40>
  400524:	97ffffe7 	bl	4004c0 <__libc_start_main@plt>
  400528:	97ffffee 	bl	4004e0 <abort@plt>
  40052c:	00000000 	.inst	0x00000000 ; undefined
  400530:	00400668 	.word	0x00400668
  400534:	00000000 	.word	0x00000000
  400538:	004006d8 	.word	0x004006d8
  40053c:	00000000 	.word	0x00000000
  400540:	00400758 	.word	0x00400758
  400544:	00000000 	.word	0x00000000

0000000000400548 <call_weak_fn>:
  400548:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf85c>
  40054c:	f947f000 	ldr	x0, [x0, #4064]
  400550:	b4000040 	cbz	x0, 400558 <call_weak_fn+0x10>
  400554:	17ffffdf 	b	4004d0 <__gmon_start__@plt>
  400558:	d65f03c0 	ret
  40055c:	00000000 	.inst	0x00000000 ; undefined

0000000000400560 <deregister_tm_clones>:
  400560:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400564:	9100c000 	add	x0, x0, #0x30
  400568:	b0000081 	adrp	x1, 411000 <__libc_start_main@GLIBC_2.17>
  40056c:	9100c021 	add	x1, x1, #0x30
  400570:	eb00003f 	cmp	x1, x0
  400574:	540000a0 	b.eq	400588 <deregister_tm_clones+0x28>  // b.none
  400578:	90000001 	adrp	x1, 400000 <_init-0x480>
  40057c:	f943bc21 	ldr	x1, [x1, #1912]
  400580:	b4000041 	cbz	x1, 400588 <deregister_tm_clones+0x28>
  400584:	d61f0020 	br	x1
  400588:	d65f03c0 	ret
  40058c:	d503201f 	nop

0000000000400590 <register_tm_clones>:
  400590:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400594:	9100c000 	add	x0, x0, #0x30
  400598:	b0000081 	adrp	x1, 411000 <__libc_start_main@GLIBC_2.17>
  40059c:	9100c021 	add	x1, x1, #0x30
  4005a0:	cb000021 	sub	x1, x1, x0
  4005a4:	9343fc21 	asr	x1, x1, #3
  4005a8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4005ac:	9341fc21 	asr	x1, x1, #1
  4005b0:	b40000a1 	cbz	x1, 4005c4 <register_tm_clones+0x34>
  4005b4:	90000002 	adrp	x2, 400000 <_init-0x480>
  4005b8:	f943c042 	ldr	x2, [x2, #1920]
  4005bc:	b4000042 	cbz	x2, 4005c4 <register_tm_clones+0x34>
  4005c0:	d61f0040 	br	x2
  4005c4:	d65f03c0 	ret

00000000004005c8 <__do_global_dtors_aux>:
  4005c8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4005cc:	910003fd 	mov	x29, sp
  4005d0:	f9000bf3 	str	x19, [sp, #16]
  4005d4:	b0000093 	adrp	x19, 411000 <__libc_start_main@GLIBC_2.17>
  4005d8:	3940c260 	ldrb	w0, [x19, #48]
  4005dc:	35000080 	cbnz	w0, 4005ec <__do_global_dtors_aux+0x24>
  4005e0:	97ffffe0 	bl	400560 <deregister_tm_clones>
  4005e4:	52800020 	mov	w0, #0x1                   	// #1
  4005e8:	3900c260 	strb	w0, [x19, #48]
  4005ec:	f9400bf3 	ldr	x19, [sp, #16]
  4005f0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4005f4:	d65f03c0 	ret

00000000004005f8 <frame_dummy>:
  4005f8:	17ffffe6 	b	400590 <register_tm_clones>

00000000004005fc <add>:
  4005fc:    d10043ff     sub    sp, sp, #0x10		// sp=sp-0x10
  400600:    b9000fe0     str    w0, [sp, #12]		// [sp+12]=w0
  400604:    b9000be1     str    w1, [sp, #8]		// [sp+8]=w1
  400608:    b9400fe1     ldr    w1, [sp, #12]		// w1=[sp+12]
  40060c:    b9400be0     ldr    w0, [sp, #8]		// w0=[sp+8]
  400610:    0b000020     add    w0, w1, w0		// w0=w1+w0
  400614:    910043ff     add    sp, sp, #0x10		// sp=sp+0x10
  400618:    d65f03c0     ret

000000000040061c <mul>:
  40061c:    d10043ff     sub    sp, sp, #0x10		// sp=sp-0x10
  400620:    b9000fe0     str    w0, [sp, #12]		// [sp+12]=w0
  400624:    b9000be1     str    w1, [sp, #8]		// [sp+8]=w1
  400628:    b9400fe1     ldr    w1, [sp, #12]		// w1=[sp+12]
  40062c:    b9400be0     ldr    w0, [sp, #8]		// w0=[sp+8]
  400630:    1b007c20     mul    w0, w1, w0		// w0=w1*w0
  400634:    910043ff     add    sp, sp, #0x10		// sp=sp+0x10
  400638:    d65f03c0     ret

/*
    x29            0x7ffffff3f0        549755810800
    x30            0x400690            4195984
    sp             0x7ffffff3f0        0x7ffffff3f0
    pc             0x40063c            0x40063c
 */
000000000040063c <callback_self>:
  40063c:    a9be7bfd     stp    x29, x30, [sp, #-32]!
  400640:    910003fd     mov    x29, sp		// x29 = sp = 0x7ffffff3d0
  400644:    b9001fa0     str    w0, [x29, #28]		// 0x7ffffff3ec:   0xfffff41000000003
  400648:    b9001ba1     str    w1, [x29, #24]		// 0x7ffffff3e8:   0x0000000300000003
  40064c:    f9000ba2     str    x2, [x29, #16]		// 0x7ffffff3e0:   0x00000000004005fc
  400650:    f9400ba2     ldr    x2, [x29, #16]		// x2 = 0x4005fc
  400654:    b9401ba1     ldr    w1, [x29, #24]		// w1 = 3
  400658:    b9401fa0     ldr    w0, [x29, #28]		// w0 = 3
  40065c:    d63f0040     blr    x2        // 0x4005fc(3, 3)
  400660:    a8c27bfd     ldp    x29, x30, [sp], #32
  400664:    d65f03c0     ret

/*
    x29            0x7ffffff410        549755810832
    x30            0x7fb7d9e6e0        548545357536
    sp             0x7ffffff410        0x7ffffff410
    pc             0x400668            0x400668
*/
0000000000400668 <main>:
  400668:    a9be7bfd     stp    x29, x30, [sp, #-32]!
  40066c:    910003fd     mov    x29, sp		// x29 = sp = 0x7ffffff3f0
  400670:    b9001fa0     str    w0, [x29, #28]		// 0x7ffffff40c:   0x0000000000000001
  400674:    f9000ba1     str    x1, [x29, #16]		// 0x7ffffff400:   0x0000007ffffff548
  400678:    90000000     adrp    x0, 400000 <_init-0x480>
  40067c:    9117f000     add    x0, x0, #0x5fc		// x0 = 0x4005fc
  400680:    aa0003e2     mov    x2, x0			// x2 = 0x4005fc
  400684:    52800061     mov    w1, #0x3               // w1 = #3
  400688:    52800060     mov    w0, #0x3               // w0 = #3
  40068c:    97ffffec     bl    40063c <callback_self>  // callback_self(3, 3, 0x4005fc)
  400690:    2a0003e1     mov    w1, w0
  400694:    90000000     adrp    x0, 400000 <_init-0x480>
  400698:    911e2000     add    x0, x0, #0x788
  40069c:    97ffff95     bl    4004f0 <printf@plt>
  4006a0:    90000000     adrp    x0, 400000 <_init-0x480>
  4006a4:    91187000     add    x0, x0, #0x61c		// x0 = 0x40061c
  4006a8:    aa0003e2     mov    x2, x0			// x2 = 0x40061c
  4006ac:    52800061     mov    w1, #0x3               // #3
  4006b0:    52800060     mov    w0, #0x3               // #3
  4006b4:    97ffffe2     bl    40063c <callback_self>  // callback_self(3, 3, 0x40061c)
  4006b8:    2a0003e1     mov    w1, w0
  4006bc:    90000000     adrp    x0, 400000 <_init-0x480>
  4006c0:    911e6000     add    x0, x0, #0x798		// 0x400798:       0x25203d206c756d5b
  4006c4:    97ffff8b     bl    4004f0 <printf@plt>
  4006c8:    52800000     mov    w0, #0x0                       // #0
  4006cc:    a8c27bfd     ldp    x29, x30, [sp], #32
  4006d0:    d65f03c0     ret
  4006d4:	00000000 	.inst	0x00000000 ; undefined

00000000004006d8 <__libc_csu_init>:
  4006d8:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4006dc:	910003fd 	mov	x29, sp
  4006e0:	a901d7f4 	stp	x20, x21, [sp, #24]
  4006e4:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf85c>
  4006e8:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf85c>
  4006ec:	91374294 	add	x20, x20, #0xdd0
  4006f0:	913722b5 	add	x21, x21, #0xdc8
  4006f4:	a902dff6 	stp	x22, x23, [sp, #40]
  4006f8:	cb150294 	sub	x20, x20, x21
  4006fc:	f9001ff8 	str	x24, [sp, #56]
  400700:	2a0003f6 	mov	w22, w0
  400704:	aa0103f7 	mov	x23, x1
  400708:	9343fe94 	asr	x20, x20, #3
  40070c:	aa0203f8 	mov	x24, x2
  400710:	97ffff5c 	bl	400480 <_init>
  400714:	b4000194 	cbz	x20, 400744 <__libc_csu_init+0x6c>
  400718:	f9000bb3 	str	x19, [x29, #16]
  40071c:	d2800013 	mov	x19, #0x0                   	// #0
  400720:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400724:	aa1803e2 	mov	x2, x24
  400728:	aa1703e1 	mov	x1, x23
  40072c:	2a1603e0 	mov	w0, w22
  400730:	91000673 	add	x19, x19, #0x1
  400734:	d63f0060 	blr	x3
  400738:	eb13029f 	cmp	x20, x19
  40073c:	54ffff21 	b.ne	400720 <__libc_csu_init+0x48>  // b.any
  400740:	f9400bb3 	ldr	x19, [x29, #16]
  400744:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400748:	a942dff6 	ldp	x22, x23, [sp, #40]
  40074c:	f9401ff8 	ldr	x24, [sp, #56]
  400750:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400754:	d65f03c0 	ret

0000000000400758 <__libc_csu_fini>:
  400758:	d65f03c0 	ret

Disassembly of section .fini:

000000000040075c <_fini>:
  40075c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400760:	910003fd 	mov	x29, sp
  400764:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400768:	d65f03c0 	ret
